MAX5890EGK+D【PDF 12/16 页】IC DAC 14BIT LVDS 600MSPS 68-QFN

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Sheet目录2011

8页 9页 10页 11页 [12页]13页 14页 15页 16页

MAX5890

14-Bit, 600Msps, High-Dynamic-Performance

DAC with LVDS Inputs

_______________________________________________________________________________________

Note 2: This parameter does not include update-rate-dependent effects of sin(x)/x filtering inherent in the MAX5890.

Note 3: Parameter measured single-ended with 50

double-terminated outputs.

Note 4: Not production tested. Guaranteed by design.

Note 5: Parameter defined as the change in midscale output caused by a

±5% variation in the nominal supply voltages.

Note 6: Not production tested. Guaranteed by design.

Note 7: Differential input voltage defined as VD_P - VD_N.

Note 8: Combination of logic-high/-low and common-mode voltages must not exceed absolute maximum rating for D_P/D_N inputs.

ELECTRICAL CHARACTERISTICS (continued)

(AVDD3.3 = DVDD3.3 = AVCLK = 3.3V, AVDD1.8 = DVDD1.8 = 1.8V, external reference VREFIO = 1.2V, output load 50

double-terminat-

ed, transformer-coupled output, IOUT = 20mA, TA = -40°C to +85°C, unless otherwise noted. Specifications at TA

≥ +25°C are guar-

anteed by production testing. Specifications at TA < +25°C are guaranteed by design and characterization. Typical values are at TA

= +25°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Input Resistance

RCLK

Single-ended

Input Capacitance

CCLK

3pF

POWER SUPPLIES

AVDD3.3

3.135

3.3

3.465

Analog Supply Voltage Range

AVDD1.8

1.710

1.8

1.890

Clock Supply Voltage Range

AVCLK

3.135

3.3

3.465

DVDD3.3

3.135

3.3

3.465

Digital Supply Voltage Range

DVDD1.8

1.710

1.8

1.890

fCLK = 100MHz, fOUT = 16MHz

26.5

fCLK = 500MHz, fOUT = 16MHz

26.5

28.5

IAVDD3.3

fCLK = 600MHz, fOUT = 16MHz

26.5

fCLK = 100MHz, fOUT = 16MHz

11.3

fCLK = 500MHz, fOUT = 16MHz

Analog Supply Current

IAVDD1.8

fCLK = 600MHz, fOUT = 16MHz

fCLK = 100MHz, fOUT = 16MHz

2.8

fCLK = 500MHz, fOUT = 16MHz

2.8

3.6

Clock Supply Current

IAVCLK

fCLK = 600MHz, fOUT = 16MHz

2.8

fCLK = 100MHz, fOUT = 16MHz

0.2

fCLK = 500MHz, fOUT = 16MHz

0.2

0.5

IDVDD3.3

fCLK = 600MHz, fOUT = 16MHz

0.2

fCLK = 100MHz, fOUT = 16MHz

10.6

fCLK = 500MHz, fOUT = 16MHz

Digital Supply Current

IDVDD1.8

fCLK = 600MHz, fOUT = 16MHz

50.5

fCLK = 100MHz, fOUT = 16MHz

137

fCLK = 500MHz, fOUT = 16MHz

264

298

fCLK = 600MHz, fOUT = 16MHz

297

Total Power Dissipation

PDISS

Power-down, clock static low,

data input static

Power-Supply Rejection Ratio

PSRR

(Note 5)

±0.025

%FS

VD_N

VD_P

VIHLVDS

VILLVDS

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